The company’s products are already fully compatible with Sifive’s RISC-V processor cores. The Insight support includes Sifive’s latest Nexus-based trace implementation, which enables ongoing monitoring and recording of processor instruction execution.
Via Segger’s J-Link Plus, Pro and Ultra debug probe options, along with the accompanying Ozone debugger and performance analysis software package, engineers can use SiFive Insight using on-chip trace functionality.
Among relevant features incorporated within the debug probes is a backtracing capability, which means the execution history can be accessed and stepped through backwards.
Other features, like code coverage and profiling, can also be employed based on the execution counters processed by the J-Link software.
The Ozone debug software package can also generate code coverage reports for software validation.
Drew Barbier, director of product marketing at Sifive says “Segger has supported Sifive Core IP since 2017 and continues to be a valued partner in the expansion and adoption of risc-v for embedded solutions. We look forward to continued cooperation as the risc-v ecosystem continues to grow and evolve.”
“Sifive continues to innovate with solid offerings for the global risc-v community,” adds Rolf Segger, founder of Segger. “We are proud to support its team’s efforts by offering high quality development tools and ensuring that the exciting new features they are introducing can be fully leveraged using our industry-leading Ozone debugger software and J-Link debug probe products.”
For more information on SEGGER’s support for RISC-V please visit:
Embedded World: Segger releases AppWizard for GUI design
Segger Systemview V3.10 adds data acquisition via UART and TCP/IP
Segger adds Wi-Fi debug probe with USB interfaces to J-Link family
Segger Embedded Studio adds support for 3rd party debug probes