“The process of selecting an IC for a boost regulator differs from that for a buck regulator, with the main difference being the relationship between the required output current and the regulator IC data sheet specifications. In a buck topology, the average Inductor current is essentially the same as the load current. This is not the case with the boost topology, which requires calculations based on the switch current. This article describes the selection criteria for a boost regulator IC (with internal MOSFETs) or controller ICs (with external MOSFETs) and how to use LTspice® to select the appropriate peripheral components to build a complete boost power stage.
By: Rani Feldman, Senior Field Applications Engineer, Analog Devices
The process of selecting an IC for a boost regulator differs from that for a buck regulator, with the main difference being the relationship between the required output current and the regulator IC data sheet specifications. In a buck topology, the average inductor current is essentially the same as the load current. This is not the case with the boost topology, which requires calculations based on the switch current. This article describes the selection criteria for a boost regulator IC (with internal MOSFETs) or controller ICs (with external MOSFETs) and how to use LTspice® to select the appropriate peripheral components to build a complete boost power stage.
Why Switching Current Matters
What is the input voltage and output voltage? This is the first question to ask when choosing a buck or boost DC-DC converter. The second question is, what is the output current required to meet the expected load? While the input and output issues of a buck and a boost are the same, the process for selecting the right IC to meet the input and output requirements is quite different.
If you compare the buck IC product selection table with the boost IC product selection table, the first hint that the boost selection process is different from the buck selection process is obvious. Figure 1 shows a selection table for some internal power switch buck products. It can be seen that the output current is one of the main selection parameters.
Figure 1. Internal Power Switch Buck Product Selection Chart Displaying Output Current as a Selection Parameter
Let’s compare Figure 1 (internal power switch buck product selection table) with Figure 2 (internal power switch boost product selection table). In the boost selection table, the output current is not even shown as a selection parameter, but is replaced by the switch current.
Figure 2. Switching current instead of output current as a parameter in the product selector for a boost converter IC
Another hint that boost follows different rules is that there’s a neat but important current statement in the boost’s data sheet header. For example, Figure 3 shows the front page of the data sheet for the LTC3621 monolithic buck regulator, which clearly states the 17 V maximum VIN and 1 A continuous load capability.
Figure 3. LTC3621 Buck Regulator Data Sheet Front Page Shows Maximum Typical Operating Voltage and Current
In contrast, the title of the LT8330 monolithic boost regulator data sheet states the maximum voltage (60 V) and current (1 A) of the switch (internal power MOSFET), not the typical maximum values of load current and input voltage . It can also be seen that the input voltage range of the boost regulator, 3 V to 40 V, is not consistent with the 60 V maximum switching voltage.
Figure 4. LT8330 Boost Regulator IC Data Sheet Front Page Shows Maximum Power Switching Capability
Why is there such a difference? In a buck regulator, the average inductor current is approximately equal to the output (load) current, which is not the case in a boost topology. Let’s compare boost and buck topologies to see why.
Figure 5. Asynchronous boost
Figure 5 shows a simplified schematic of an asynchronous boost topology, and Figure 6 shows a simplified schematic of an asynchronous buck topology. The D modules of both are PWM signals that drive power MOSFETs, and the duty cycle of the switching cycle is determined by the ratio of the input and output voltages. In this article, for simplicity, I use the lossless continuous conduction mode (CCM) equation because the results are close enough.
Figure 6. Simplified Schematic of an Asynchronous Buck Regulator
By using LTspice, we can clearly see the difference between the input and output currents of these two different topologies. Figure 7 shows the basic open-loop design of a buck regulator to convert a 12 V input voltage to a 3.3 V output voltage, delivering 1 A (3.3 W) to a resistive load R1. The PWM D block is implemented with the V2 floating supply because we need VGATE > VSOURCE to establish conduction for the N-channel MOSFET M1. V2 is used as a PULSE voltage source to achieve a 0 V to 5 V pulse that starts at time 0 of the emulation, transitions from 0 V to 5 V in 5 ns, and back in 5 ns, TON is 550 ns, and TP (full switching period) equals 2 µs.
Figure 7. Buck Regulator Open-Loop Topology Converting from 12 V to 3.3 V at 1 A – About 3 W Design
After running the simulation of the circuit in Figure 7, the currents of L1 and R1 can be probed with the probes. The current in L1 is triangular when charging and discharging because M1 switches according to the timing of TON (the time M1 is on) and the timing of TOFF (the time M1 is off).
The L1 current is switched at a switching frequency of 500 kHz. It can be seen that the inductor current is an AC+DC waveform. It transitions from a minimum value of 0.866 A (at the end of TOFF) to a maximum of 1.144 A (at the end of TON). When the AC signal seeks the path of least impedance, the AC portion of the current flows through the ESR of the output capacitor C2. This alternating current and the charging and discharging of C2 cause output voltage ripple, while the direct current flows through R2.
By comparing the triangle shapes formed by the inductor current above and below the load current, you can see that they are equal, and a simple algebraic calculation shows:
The average inductor current is equal to the load current.
Figure 8. Buck Topology – Example of Inductor Current and Load Current Simulation
When searching for a buck regulator IC, one can assume that the data sheet shows the maximum allowable output current because IIN ≈ IOUT, which is not the case for boost topologies.
Let’s take a look at Figure 9, which shows an open-loop boost design for a 3.3 V to 12 V output at 0.275 A, or about 3.3 W. At this point, what is the average inductor current?
In Figure 10, the output current is 291 mA, the DC trace of I(R2) – close to the calculated value. Although the simulated load current is 291 mA, the simulation shows an average value of 945 mA for the inductor current with a peak value of over 1 A. This is more than 3.6 times the output current. During TON (the time M2 is on, and there is V3 voltage on L2), the inductor charges from its minimum value to its maximum value. During TON, D2 is turned off and the load current is provided by the output capacitor.
During TON, the inductor is in series with the MOSFET, so any current flowing through the input inductor will flow through the switch. Because of this, the data sheet specifies the maximum current ISW that can flow through the switch. When choosing a boost IC for a new design, you should know the maximum expected current through the switch.
For example, select a boost regulator for the following applications:
• VIN = 12V
• VOUT = 48V
• IOUT = 0.15A
To select the correct boost regulator, one needs to find the average input current, which is the current flowing through the inductor and MOSFET during TON. To find this current, inversely derive from output to input based on output power and efficiency:
• POUT = VOUT × IOUT = 48 V × 0.15 A = 7.2 W
• Assume an efficiency of 0.85 (use the data sheet value if there is an efficiency curve with input and output parameters similar to the desired design).
• PIN = POUT/efficiency = 7.2 W/0.85 = 8.47 W
• IIN_AV = average input current. This is the average current flowing in the inductor and switch during the on-time, calculated from PIN/VIN = 8.47 W/12 V = 0.7 A.
• Again, IIN is the average inductor current, and the maximum peak current will be 1.15 to 1.20 higher than IIN, providing 30% to 40% more ripple current. Therefore, IPEAK = IIN × 1.2 = 0.7 A × 1.2 = 0.847 A.
Figure 9. Boost topology: 3.3 V to 12 V, ~3.3 W
Figure 10. LTspice simulation results for an open-loop boost from 3.3 V to 12 V at 0.275 A
Figure 11. Schematic during TON: M2 on, V3 in parallel with L2, D2 off
VSW, transistor maximum allowable voltage and duty cycle limit
The VIN range of an IC is usually specified in the data sheet – the recommended range and the absolute maximum. In the data sheet, the highest possible output voltage that a boost regulator with an internal power switch can produce is stated at its maximum VSW rating. If you are using a boost controller with an external MOSFET as the power switch, the VDS rating specified in the MOSFET data sheet is what limits the maximum output voltage.
For example, the LT8330 boost regulator has an input voltage range of 3 V to 40 V, an absolute maximum switching voltage of 60 V, and a fixed switching frequency of 2 MHz. Although the 60 V absolute maximum switching voltage rating enables this part to produce a 60 V boost output, it is best practice to stay at least 2 V below this value.
The output voltage is also limited by the duty cycle. The maximum and minimum duty cycles may be found in the data sheet or calculated. By converting from 12 V to 48 V using the LT8330, the CCM ignores the diode drop to obtain a high conversion ratio, and the duty cycle can be calculated from the input and output voltages:
• D = (VO C VIN)/VO = (48 VC 12 V)/48 V = 0.75 or 75%
• Check that the IC operates at the desired duty cycle.
• The formula for calculating the IC minimum duty cycle is as follows:
DMIN = minimum TON(MAX) × fSW(MAX)
• The formula for calculating the IC maximum duty cycle is as follows:
DMAX = 1 C (minimum TOFF(MAX) × fSW(MAX))
The minimum TON and minimum TOFF can be found in the electrical characteristics table of the data sheet. The maximum values in the Min, Type, and Max columns in this table can be used. Using the LT8330’s published values and the DMIN and DMAX equations, DMIN = 0.225 and DMAX = 0.86. As you can see from the results, the LT8330 should be able to convert from 12 V to 48 V as the design calls for a duty cycle of 0.75.
Understanding Peripheral Stress Using LTspice
The schematic shown in Figure 12 implements the previously introduced design concept using the LT8330 in a 12 V input to 48 V output converter supporting a 150 mA load.
Figure 12. LT8330 for 150 mA Load Current in 12 V to 48 V Converter
From LTspice simulations, we can plot and measure a variety of parameters. Parameters to help you choose IC, as shown in Figure 13.
VSW and duty cycle
After running the simulation, you can view the SW node behavior as a waveform to understand what voltage is present on the power switch during switching. To do this, hover over the SW node so that the crosshairs turn into a red voltage probe. Click to plot switch node behavior on the waveform viewer. The resulting graph corresponds to the drain of the internal power MOSFET.
As expected, when the MOSFET is on, the voltage potential is close to ground, but more importantly, during TOFF, when the MOSFET is off, the drain voltage is affected by the output voltage and the diode drop. Now we know what the stress is on the VDS of the MOSFET. If we have chosen a controller design that uses an external MOSFET as the power switch, the VDS rating of the chosen MOSFET should be 60 V.
In the LTspice waveform viewer, horizontal and vertical measurements can be made using cursors, similar to cursors on an oscilloscope. To recall the cursors, click on the V(sw) label in the LTspice waveform viewer. This will attach the first cursor to the track, click again to attach the second cursor to the same track. Alternatively, right-click this label and select the desired cursor for a given probe trajectory. Use these cursors to measure TON and calculate the duty cycle by dividing TON by the period.
TPERIOD = TON + TOFF = 1/fSW. Previously, we calculated this to be 75% or 0.75. Using LTspice, the resulting value is about 373 ns. The LT8330 uses a fixed switching frequency of 2 MHz, so TP = 1/2e6 = 500 ns and a duty cycle of 373 ns/500 ns = 0.746.
Figure 13. Switch node diagram on the graph viewer in LTspice
Figure 14. Measure TON to confirm estimated duty cycle
Peak Current and Voltage on Inductor
To choose an inductor for a boost application, you need to know whether the inductor can handle the current and voltage it is going to handle—that is, the peak inductor current and the TON and TOFF voltages. This can also be estimated using differential probes in LTspice. To differentially probe the inductance, hover over the IN node and the crosshairs will turn into a red probe. Click and drag the mouse to the SW node. The cursor color will change to black. Release the mouse when it stops on the second node.
In Figure 15, the voltage between nodes IN and SW is probed differentially across the inductor. During TON, the MOSFET is on and the right side of the inductor is grounded and the left side is at VIN, so that the voltage across the inductor is 12 V during TON. During TOFF, the MOSFET is off and the right side of the inductor is placed at 48 V, while the left side is at VIN during TON. Since the differential probe subtracts VSW from VIN, you get C36 V, but the sign doesn’t matter now. The important thing is that the inductance varies between 12 V and 36 V.
During TON, the voltage across the inductor draws a positive di/dt, the slope of the blue I(L1) plot. The maximum point of this trajectory is IPEAK, which is calculated to be 0.847 A. By using LTspice, it can be seen that the peak current is about 866 mA.
To properly select an inductor with sufficient current rating (IR) and saturation current (ISAT), it is important to understand this peak current. IR is more about how much heat is generated at a specified current, while ISAT is for events that invoke short circuit protection. If a regulator with an internal MOSFET is used, (ISAT > regulator current limit), and the controller is used with an external MOSFET, when the current limit is triggered, (ISAT > peak inductance value).
It is important to note that the inductors or diodes of the boost topology described here do not have current limiting values. If the switch is not in use, or the IC is disconnected, there is a direct path between the input and output. Some ICs offer additional protection features such as output disconnection during shutdown, inrush current limiting, and other features that address this direct input-to-output connection—for example, the LTC3122 and LTC3539.
To improve efficiency, inductors with low DCR (direct current resistance) and low core losses should be used. The DCR at a specific temperature is stated in the inductor data sheet – it rises with temperature and has a tolerance. With PINDUCTOR_LOSS = IIN_AV² × DCR, DC losses can be easily calculated, while AC losses and core losses can be found in the manufacturer’s simulation or other documentation. LTspice can integrate the power to calculate the associated power consumption. Providing LTspice with the DCR and other known parasitics of the inductance record improves LTspice simulation accuracy.
Figure 15. Voltage and Current Through Inductor at Steady State
Figure 16. Measuring Inductor Peak Current
Current and voltage through the diode
Figure 17 shows the simulated differential voltage across diode VSW, OUT, diode forward current I(D1) and inductor current I(L1). When the switch is on (during TON), the anode is near ground and the cathode is at the output voltage, so the diode will be reverse biased, exposed to its maximum voltage, which is VOUT. The first criterion is to choose a diode with VRRM (maximum peak repetitive reverse voltage) higher than VOUT.
The peak inductor current flows through the diode after the MOSFET is turned off, at the beginning of the TOFF period, so the diode peak current is the same as the inductor peak current. Diode data sheets include a parameter called IFRM (repetitive peak forward current), specified in duration and duty cycle. This parameter is usually higher than the average current that the diode can supply.
After the simulation is complete, LTspice can integrate all the waveforms in the waveform viewer to get the rms and average value, and use the same calculation to calculate the average current that the diode will handle. First, zoom in on the portion of the waveform you want to integrate—zooming effectively sets the integration boundaries. In this example, you can scale to cover a large number of steady state cycles (not startup or shutdown). To set integration boundaries, drag to select a steady state time period and hover over the graph name. For example, the integration results shown in Figure 18 cover 0.75 ms, or over 1000 cycles. The cursor will turn into a hand icon. Press the CTRL key and click to invoke the integration window of the waveform viewer.
The integration dialog shown in Figure 18 shows that the average current through the diode is 150 mA. This value should be less than the maximum average forward current, IF(AV), which is specified in the diode data sheet at the specified temperature.
Diode power dissipation
The power dissipation of the diode can also be calculated by simulation. The total power dissipation PTOT (total power) and junction-to-ambient thermal resistance RTH at 25°C are specified in the diode data sheet. In LTspice, hover the cursor over the diode to Display the power consumption on the waveform viewer. When you hover the cursor over a discrete component or voltage source, the cursor turns into a current probe. Press the ALT key to change the cursor to a thermometer, click to Display the simulated power consumption of the diode. Amplify steady-state operation and integrate the waveform using the same procedure as previously described for integrating the diode current. The diode power capacity contains the voltage across the diode and the current flowing through it.
Figure 17. Diode Voltage and Current and Current in Inductor
Figure 18. Integrating the diode current at steady state yields IF(AV) and I(RMS) values
Figure 19. Integrating Diode Power Loss to Get Average Power Dissipation
Figure 20. Reverse recovery spikes as diode discharges. The lower the value, the lower the power consumption. This capacitance varies with voltage.
(a) Diode reverse recovery current spike. (b) Amplifier diode reverse recovery current spike.
Some capacitance of the diode charges up during its conduction period. When the diode no longer conducts, the accumulated charge must be discharged. This damped charge movement results in power loss, so a low capacitance value is recommended. This capacitance value varies with the diode’s reverse voltage, and a graph showing this effect should be included in the diode data sheet. This internal capacitance is usually shown as Cd in diode data sheets and Cjo in the LTspice database.
The use of low capacitance diodes relaxes the requirement for maximum reverse recovery current, which improves efficiency. Figure 20 shows the content related to the recovery current. The power dissipation inherent in reverse recovery is left as an exercise for the reader.
When choosing a boost IC, start with the output. Derive backwards from the desired output voltage and load current to find the input power, taking efficiency into account. From this, the average and peak input current values are determined. In a boost converter, the average current flowing in the inductor is higher than the load current, making the IC selection process different from a buck converter. Selecting the proper rated components for a boost converter requires knowledge of the regulator peak and average voltage and current, which can be determined using LTspice.