Designers of energy infrastructure, from electric vehicle (EV) charging stations and solar inverters to energy storage and uninterruptible power systems, are continually challenged to reduce carbon footprint, improve reliability, and lower cost.
To accomplish these goals, they need to look closely to see how they can optimize their power conversion solutions to reduce conduction and switching losses, maintain good thermal performance, reduce overall form factor, and lower electromagnetic interference (EMI). They must also ensure the solution of choice is capable of meeting the production part approval process (PPAP) and be qualified to AEC-Q101.
To meet these challenges, designers can turn to a variety of silicon carbide (SiC) power MOSFETs, SiC Schottky diodes, gate driver ICs, and power modules.
This article briefly reviews how SiC technology can increase efficiency and reliability and reduce cost, compared to classic silicon (Si) approaches. It then looks at packaging and system integration options for SiC before introducing several real-world examples from onsemi and showing how designers can best apply them to optimize SiC power MOSFET and gate driver performance to meet the energy infrastructure challenge.
SiC vs Si
SiC is a wide bandgap (WBG) material, with a bandgap of 3.26 electron volts (eV) compared with the 1.12 eV bandgap of Si. It also offers 10X the breakdown field capability, over 3x the thermal conductivity, and can operate at much higher temperatures compared with Si. Those specifications make SiC well-suited for use in energy infrastructure applications (Table 1).
Table 1: The material properties of 4H-SiC compared with Si make SiC well-suited for use in energy infrastructure applications. (Image source: onsemi)
The higher breakdown field allows thinner SiC devices to have the same voltage rating as thicker Si devices, and the thinner SiC devices have a correspondingly lower on-resistance and higher current capability. The mobility parameter of SiC is on the same order of magnitude as Si, making both materials usable in high-frequency power conversion, which supports compact form factors. Their higher thermal conductivity means that SiC devices experience a lower temperature rise at higher current levels. The operating temperature of SiC devices is limited by packaging factors such as wirebonds, not SiC material characteristics. As a result, the selection of the optimal packaging style is an important consideration for designers when using SiC.
SiC’s material characteristics make it a superior choice for many high-voltage, high-speed, high-current, and high-density power conversion designs. In many cases, the question is not whether to use SiC, the question is what SiC packaging technology provides the optimal performance and cost tradeoffs.
Designers have three basic packaging choices when using SiC power technology; discrete devices, intelligent power modules (IPMs), or power integrated modules (PIMs), each of which offers a unique set of cost and performance tradeoffs (Table 2). For example:
- Discrete devices are generally preferred when cost is a primary consideration, such as consumer applications. They also support dual sourcing and have long lifetimes.
- IPM solutions reduce design time, have the highest reliability and are the most compact solutions for moderate power levels.
- PIMs can support higher power designs with good power densities, reasonably fast time to market, a wide variety of design options, and more opportunities for dual sourcing, compared with IPMs.
Table 2: Comparison of integration features and tradeoffs when choosing between discrete, IPM and PIM SiC packaging solutions. (Image source: onsemi)
Hybrid Si/SiC IPMs
While it’s possible to develop solutions using only SiC devices, it’s sometimes more cost-effective to use hybrid Si/SiC designs. For example, the NFL25065L4BT hybrid IPM from onsemi combines fourth-generation Si IGBTs with a SiC boost diode on the output to form an interleaved power factor correction (PFC) input stage for consumer, industrial and medical applications (Figure 1). This compact IPM includes an optimized gate drive for the IGBTs to minimize EMI and losses. Integrated protection features include under−voltage lockout, over−current shutdown, thermal monitoring, and fault reporting. Other features of the NFL25065L4BT include:
- 600 volt/50 ampere (A) two-phase interleaved PFC
- Optimized for 20 kilohertz (kHz) switching frequency
- Low thermal resistance using aluminum oxide direct bond copper (DBC) substrate
- Integrated negative temperature coefficient (NTC) thermistor for temperature monitoring
- Isolation rating of 2500 volts root mean square (rms)/1 minute
- UL certification
Figure 1: The NFL25065L4BT IPM forms an interleaved PFC stage using fourth-generation Si IGBTs with a SiC boost diode on the output. (Image source: onsemi)
For solar inverters, EV charging stations, and similar applications that can benefit from using a SiC-based PIM to maximize power delivery with reduced footprint and smaller overall volume, designers can turn to the NXH006P120MNF2PTG. This device comprises a 6 milliohm (mΩ), 1200 volt, SiC MOSFET half−bridge and an integrated NTC thermistor in an F2 package (Figure 2). Package options include:
- With or without pre−applied thermal interface material (TIM)
- Solderable pins or press-fit pins
Figure 2: The NXH006P120MNF2PTG integrated power module comes in an F2 package with press-fit pins. (Image source: onsemi)
These IPMs have a maximum operating junction temperature of 175 degrees Celsius (°C) and require external control and gate drivers. The optional press-fit technology, also called cold welding, provides a reliable connection between the pins and plated-through holes on the pc board. Press-fit provides simplified assembly without soldering and produces a gas-tight, low resistance, metal-to-metal connection.
SiC Schottky diodes
SiC Schottky diodes can be used in combination with IPMs, or in 100% discrete designs, and they provide better switching performance and higher reliability compared to Si diodes. SiC Schottky diodes, like the 1700 volt/25 A NDSH25170A, have no reverse recovery current, excellent thermal performance, and temperature-independent switching characteristics. These translate into higher efficiency, faster switching frequencies, higher power densities, lower EMI, and easy paralleling, all of which contribute to reducing solution size and cost (Figure 3). Features of the NDSH25170A include:
- 175°C maximum junction temperature
- 506 millijoules (mJ) avalanche rating
- Non-repetitive surge current up to 220 A and repetitive surge currents up to 66 A
- Positive temperature coefficient
- No reverse recovery and no forward recovery
- AEC-Q101 qualification and PPAP capability
Figure 3: The 1700 volt/25 A NDSH25170A SiC Schottky diode has no reverse recovery current, excellent thermal performance, and temperature-independent switching characteristics. (Image source: onsemi)
Discrete SiC MOSFETs
Designers can combine discrete SiC Schottkys with onsemi’s 1200 V SiC MOSFETs, which also have superior switching performance, lower ON resistance, and higher reliability compared to Si devices. The compact chip size of SiC MOSFETs produces low capacitance and gate charge. Combined with their low ON resistance, the lower capacitance and gate charge help increase system efficiency, enable faster switching frequencies, increase power densities, lower electromagnetic interference (EMI), and allow smaller solution form factors. For example, the NTBG040N120SC1 is rated for 1200 volts and 60 A, and comes in a D2PAK−7L surface-mount package (Figure 4). Features include:
- 106 nanocoulombs (nC) typical gate charge
- 139 picofarads (pF) typical output capacitance
- 100% avalanche testing
- 175°C junction temperature operation
- AEC-Q101 qualification
Figure 4: The NTBG040N120SC1 SiC MOSFET is rated for 1200 volts/60 A, has an on resistance of 40 mΩ, and comes in a D2PAK−7L surface-mount package. (Image source: onsemi)
SiC MOSFET gate driver
Gate drivers for SiC MOSFETs, such as the onsemi NCx51705 line, deliver a higher drive voltage than drivers for Si MOSFETs. It takes a gate voltage of 18 to 20 volts to fully turn on a SiC MOSFET, compared with less than 10 volts needed to turn on an Si MOSFET. In addition, SiC MOSFETs require −3 to −5 volts of gate drive when switching the device off. Designers can use the NCP51705MNTXG low-side, single 6 A high-speed driver optimized for SiC MOSFETs (Figure 5). The NCP51705MNTXG delivers the maximum rated drive voltage to enable low conduction losses, and it provides high peak currents during turn-on and turn-off to minimize switching losses.
Figure 5: Simplified schematic showing two NCP51705MNTXG driver ICs (center right) driving two SiC MOSFETs (right) in a half-bridge topology. (Image source: onsemi)
Designers can use the integrated charge pump to generate a user-selectable negative voltage rail to deliver higher reliability, improved dv/dt immunity, and faster turn-off. In isolated designs, an externally accessible 5-volt rail can power the secondary side of digital or high-speed optoisolators. Protection functions in the NCP51705MNTXG include thermal shutdown based on the junction temperature of the driver circuit, and bias power undervoltage lockout monitoring.
Eval board and SiC gate drive considerations
To speed up the evaluation and design process, designers can use the NCP51705SMDGEVB eval board (EVB) for the NCP51705 (Figure 6). The EVB includes an NCP51705 driver and all the necessary drive circuitry, including an on−board digital isolator and the ability to solder any SiC or Si MOSFET in a TO−247 package. The EVB is designed for use in any low−side or high−side power switching application. Two or more of these EVBs can be configured in a totem pole drive.
Figure 6: The NCP51705SMDGEVB EVB has holes (top left) to connect an SiC or Si power MOSFET, and includes the NCP51705 driver (U1, center left) and the digital isolator IC (right center). (Image source: onsemi)
Minimization of pc board parasitic inductance and capacitance is important when using the NCP51705 gate driver with an SiC MOSFET (Figure 7). Some pc board layout considerations include:
- The NCP51705 should be as close as possible to the SiC MOSFET, with particular attention being paid to short traces between VDD, SVDD, V5V, charge pump, and VEE capacitor and the MOSFET.
- The trace between VEE and PGND should be as short as possible.
- There needs to be separation between the high dV/dt traces and the driver input and DESAT to avoid abnormal operation that can result from noise coupling.
- For high-temperature designs, thermal vias should be used between the exposed pad and the outer layer to minimize thermal impedance.
- Wide traces need to be used for OUTSRC, OUTSNK and VEE.
Figure 7: Recommended pc board layout for the NCP51705 to minimize parasitic inductance and capacitance for driving SiC MOSFETs. (Image source: onsemi)
SiC plays an important role in helping designers meet the demands of a growing number and variety of energy infrastructure applications. Designers can now use SiC devices to design more efficient high-voltage, high-speed, high-current power conversion designs that result in smaller solutions sizes and higher power densities. However, the selection of the optimal packaging style is important to get the maximum benefit from designing with SiC.
As shown, there are a range of performance, time to market and cost tradeoffs to be considered when choosing between discrete devices, IPMs and PIMs. Also, when using discrete devices or PIMs, the selection of the SiC gate driver and the optimal pc board layout are critical in order to achieve reliable and efficient system performance.
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